Next Family of DSP Cores Features Flexibility and Performance to Meet The Needs of Next Generation Embedded DSP Systems
SAN JOSE, Calif., Aug. 31 -- VLSI Technology, Inc. (Nasdaq: VLSI ) and the DSP Group (Nasdaq: DSPG ) today announced DSP Group's new PalmDSPCore(TM). The new core, which VLSI is the first to license, is another addition to VLSI's extensive embedded core roadmap that provides the needed flexibility and scalability for customers to optimize their price/performance requirements.
The PalmDSPCore is a parallel DSP architecture providing the performance and flexibility customers need to meet the demands of leading edge embedded DSP applications. The PalmDSPCore is the fourth and newest member in DSPG's SmartCores(TM) portfolio of DSP cores, following the PineDSPCore(R), the OakDSPCore(R), and the TeakDSPCore(TM).
The following features differentiate the PalmDSPCore from other DSPG SmartCore products:
- A truly parallel dual-MAC architecture Configurable data path (16-, 20- or 24-bits) to meet application specific needs
- Three instruction formats (16-bit, 32-bit parallel and 32-bit multi-parallel) ensure optimal code density
- A synthesizable soft core to ensure ease of migration to future device technologies
- 150MHz; clock at 0.2 micron technology yielding 450 OakDSPCore-equivalent Mips
Designed for Next Generation DSP Products
PalmDSPCore is designed for embedded applications that require high processor throughput and architectural flexibility such as GSM/CDMA handsets, third generation IMT-2000 wireless products, high-speed Data Subscriber Links (e.g. xDSL), pooled modems, Internet gateways and multimedia applications.
Developed by the DSP Group in cooperation with VLSI, PalmDSPCore confirms both DSPG's leadership as a DSP core IP provider, and VLSI's leadership in embedded processor-based system-level-silicon solutions.
``The combination of VLSI's experience in system-level-silicon and DSP Group's architectural expertise has allowed us to define a next generation DSP core that meets the cost, performance and power requirements of high end embedded DSP systems,'' said Ray Slusarczyk, VLSI's Director of Embedded Processing Division. ``The Palm is the next step in our embedded core roadmap, which features enhanced ARM family processors, the enhanced OAK+DSP and multicore RISC/DSP products. The PalmDSPCore is a significant step beyond traditional filter orientated DSPs and we are proud be the first vendor to bring this revolutionary architecture to market.''
``We are very proud to have VLSI Technology as our first licensee for this state of the art technology, that was realized in the PalmDSPCore family of 16, 20 and 24 bit DSP cores,'' said Gideon Wertheizer, Corporate Vice President of Marketing for DSP Group.
``Our partnership with VLSI Technology has proven to be valuable for both parties,'' said Eli Ayalon, President and CEO of DSP Group. ``Our plan is to establish the PalmDSPCore as a de facto standard embedded DSP through a large install base of licensees (currently more than 30 licensees have signed up for DSP Group's SmartCore family) and ready to use third party software,'' Ayalon added.
Will Strauss, president of Forward Concepts, a market research firm in Tempe, AZ, said, ``PalmDSPCore is a powerful platform that will be a basis for VLSI to address the next-generation DSP applications that are only now being defined. The flexibility of the data precision and instruction types will allow PalmDSPCore to be near optimal for a number of high volume applications.''
Parallel Dual-MAC Architecture Yields 2700 MOPs Performance
The PalmDSPCore is a true parallel dual-MAC architecture offering industry-leading performance for processing intensive applications while allowing clock frequency to be minimized to reduce power dissipation. The PalmDSPCore sustains an equivalent of 3 OakDSPCore instructions per cycle, yielding 450 OakDSPCore-equivalent Mips at 150 MHz while remaining the lowest power consuming core in its class. The parallel dual-MAC architecture also yields up to 2700 million operations per second (MOPs), with up to 18 OakDSPCore equivalent operations in 1 cycle using multi-parallel instructions. PalmDSPCore also supports SIMD (Single Instruction Multiple Data) and MIMD (Multiple Instruction Multiple Data) style instructions.
DSP Group's experience with customer designed embedded DSP systems has led to the identification of architectural features which make the most efficient use of the gate densities achievable with the latest deep sub-micron technology. Special efforts were made by DSP Group to optimize the PalmDSPCore to meet the marketing requirements of VLSI's customers. Statistical analysis of algorithms in such applications as GSM EFR, CDMA, Dolby AC-3 and xDSL modems provided by VLSI were taken into consideration during the development stage by DSP Group.
In cross-coupled MAC paths, the product of one multiplier can be fed into either add/sub unit thereby extending the flexibility of the DSP to include a wide range of non-FIR orientated algorithm. As an example, a Radix-2 complex FFT butterfly can be efficiently executed in 2 cycles.
New Level of Flexibility for a Wide Range of Applications
The PalmDSPCore is designed for flexibility, allowing customers to optimize system cost, performance/power budget trade-offs to best meet the needs of their specific application. Recognizing that cellular and audio applications differ in their needs for data precision, the PalmDSPCore is offered with 16, 20 or 24 bit data paths. Similarly, the PalmDSPCore does not impose a single instruction format but offers three types of instruction: 16 bit, 32 bit parallel and multi-parallel. This choice allows the designer to achieve optimum code density for reduced system cost.
The new PalmDSPCore also has a flexible co-processor interface that allows hardware accelerator blocks to be easily integrated to better meet the requirements of different applications.
Synthesizable Design Coupled with Extensive Development Tools
PalmDSPCore is a fully synthesizable ``soft core'' design that can be easily ported into different technologies and foundries using fully automated methods. VLSI's JumpStartDSP(TM), a code development and debug package specifically tuned to the needs of embedded systems, supports the PalmDSPCore.
Final development chips for the PalmDSPCore are expected to be generally available in Q2, 1999. Development tools and preliminary models for advanced architectural evaluation will be available in Q4, 1998.
DSP Group, Inc. is a leader in the development and marketing of high-performance, cost-effective digital signal processing cores, used in a wide range of applications for industries such as wireless communications, telephony and personal computer. By combining its DSP core technology with its advanced speech processing algorithms, DSP Group also delivers a wide range of enabling application-specific DSPs. DSP Group is located in Santa Clara, California.
This press release is also available through DSPG's News on Call fax service, which can be reached at 800-758-5804, company code 112025.
About VLSI Technology
VLSI Technology, Inc. designs and manufactures System-Level Silicon(TM) integrated circuits based on its FSB(TM) functional system blocks(TM) library. Targeting its offerings toward the wireless communications, networking, consumer digital entertainment and computing markets, the company offers its customers advanced system-level integration capabilities. The company is based in San Jose, California, with 1997 revenues from continuing operations of $712.7 million, and approximately 2,200 employees worldwide. Visit VLSI's homepage at http://www.vlsi.com.
NOTE: JumpStartDSP System Level Silicon, FSB and Functional System Block are trademarks or registered trademarks of VLSI Technology, Inc. PalmDSPCore, SmartCores, PineDSPCorc, OakDSPCore, and TeakDSPCore are trademarks or registered trademarks of DSP Group. All other names and marks are the property of their respective holders.
DSP Group, Inc.