IP Catalyst Program Provides Access to Synopsys Tools, Technology and Methodology for Design Reuse
MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--March 23, 1998-- Synopsys Inc. (NASDAQ:SNPS - news), the design technology leader for complex IC design, today announced the IP Catalyst program, a joining of forces with leading intellectual property (IP) developers to facilitate greater access to consistent, high-quality, portable IP.
Founding partners in the program are ARM, Argonaut RISC Cores Inc. (ARC), DSP Group Inc. [Nasdaq:DSPG - news], and Integrated Silicon Systems Ltd. (ISS). These IP Catalyst partner companies are the leading independent suppliers of RISC and DSP IP cores, the complex cores that lie at the heart of system-on-a chip designs.
The IP Catalyst program assists independent IP developers in adopting Synopsys' design reuse solutions. By collaborating with leading IP companies, Synopsys enables end-system designers to more easily use and integrate leading IP. Three of the four IP Catalyst partners -- ARC, DSP Group and ISS -- will initially focus on porting selected cores onto the Synopsys CBA architecture.
``We are pleased to participate in the IP Catalyst program with Synopsys,'' stated Irving Gold, vice president of marketing and sales, Core Technology for DSP Group. ``Our licensees use many different processes, which is both an advantage and a challenge. With membership in this program, our cores will be 'universally portable' across many different fabs and processes, thereby giving DSP Group a technology advantage in having portable IP. Through the IP Catalyst program, we can provide our licensees with portability and consistent quality resulting in shortened time to market.''
ARM Collaborates in Verification Technology
ARM joins the IP Catalyst program as the first verification partner. Synopsys and ARM will collaborate on the development and integration of verification technology. This partnership spans the current, popular ARM7TDMI core through to future generations of cores, and covers all Synopsys integration and verification tools.
``As the leading provider of complex hard IP cores, we have learned what it takes for OEMs to develop chips. Integrating ARM model views with the advanced and complete verification solutions, as supplied by Synopsys, is key to the success of ARM, our licensees, and end-system designers. We will continue to take advantage of Synopsys tools and methodologies to enhance our design flows and add value to our customers through the IP Catalyst program,'' said Alistair Greenhill, EDA business unit manager, ARM.
IP Companies Invited to Join IP Catalyst
Designing for reuse requires a more disciplined design methodology than conventional design and is greatly facilitated by a portable library. The IP Catalyst program offers IP developers best-in-class synthesis and verification tools, the CBA technology and design tools, plus SynopsysAE proven design-for-reuse methodology. Qualified, independent IP companies are invited to join IP Catalyst. Synopsys offers assistance to IP Catalyst partners who want to port their IP to CBA, which gives them easy access to over 46 processes, from over 24 semiconductor vendors.
At mid-year, IP companies can join in the IP Catalyst design-for-reuse methodology initiative. Synopsys will distribute the Reuse Methodology Manual (RMM), jointly authored by Synopsys and Mentor Graphics Corp. [Nasdaq:MENT - news], to IP Catalyst partners, and will invite partners to participate in reuse methodology workshops. The RMM offers tool and methodology guidance that produces predictable, portable IP and integrates well with leading ASIC vendor flows. Synopsys will also provide incentives to IP developers to adopt the design-for-reuse methodology and tool-flow.
IP Catalyst partners and Synopsys will also jointly work to market this easy-to-integrate IP. A catalog of IP designed using the RMM or available on CBA will be produced later this year. Information on IP Catalyst partners and their IP will also be available through the Synopsys Web site.
``Synopsys wants to partner with IP companies who have attracted the interest of our customers. By working closely with IP leaders, IP Catalyst can enable customer success in system-on-a-chip design. Linking IP developers with the Synopsys design-for-reuse tool-flow and CBA fabric is essential to rapid and predictable system-on-a-chip design,'' stated Laura Horsey, manager of the IP Catalyst program at Synopsys.
About Synopsys, Inc.
Synopsys Inc. (NASDAQ:SNPS - news), is a leading supplier of electronic design automation (EDA) solutions to the global electronic market. The company provides comprehensive design technologies to creators of advanced integrated circuits, electronic systems and systems-on-a-chip. Synopsys also provides consulting services and support to its customers to streamline the overall design process and accelerate time-to-market. Additional information about Synopsys is available at http://www.synopsys.com.
Note to Editors: Synopsys is a registered trademark of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.