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Mentor Graphics and DSP Group Announce Joint

EMBEDDED SYSTEMS CONFERENCE, SAN JOSE, Calif., Nov. 2 -- Mentor Graphics Corporation (Nasdaq: MENT) today announced a partnership with DSP Group (Nasdaq: DSPG) to support the SmartCore family of DSP Cores in its Seamless(TM) Co-Verification Environment(TM) (CVE) product. This new Seamless CVE offering will include Processor Support Packages that will enable hardware and software development teams to integrate their respective components in a virtual environment, accelerating SmartCore-based products to market by detecting bugs months before a physical prototype is available, thereby eliminating silicon re-spins. With the agreement, DSP Group joins the over 20-member strong Seamless Alliance 2000 Partnership Program.

``Hardware/software co-verification is a critical component in the system-on-chip design flow,'' said Gideon Wertheizer, corporate marketing vice president of DSP Group. ``Designers embedding our DSP cores have to validate that their application code will work in their hardware implementation. The availability of Processor Support Packages in the Seamless CVE ensures that our customers continue to experience first-pass success as they introduce embedded DSP cores into their ASIC designs.''

``DSP Group is an important addition to the Seamless Alliance,'' stated Mitch Weaver, director of Mentor Graphics' Co-Design Business Unit. ``A growing number of our telecom customers are incorporating CPU and DSP cores in their System-on-Chip designs. Pre-silicon validation of the CPU control function interaction with the DSP datapath algorithms substantially increases the hardware/software co-verification value proposition.''

Seamless Co-Verification Environment

Seamless CVE provides a platform for the early evaluation of embedded software against the embedded core ASIC design. In delivering an accurate system-on-chip verification solution, Mentor Graphics and DSP Group collaborated closely to provide the ideal solution for co-verification of DSP cores. Together, embedded code on a virtual prototype is debugged, and both the software and hardware are more likely to be correct when first silicon returns from fabrication. This broadens the Mentor Graphics co-verification offering significantly, extending support to include both the CPU and DSP marketplaces, supporting customer needs.

Availability

Seamless CVE Processor Support Packages are available today for DSP Group's OakDSPCore(TM) DSP family. For more information, or to register for a free Seamless workshop, visit the Mentor Graphics Web site at www.mentor.com/seamless.

DSP Group

DSP Group Inc. is a leader in the development and marketing of high-performance, cost-effective digital signal processing cores used in a wide range of applications for industries such as wireless communications, telephony, and personal computing. By combining its DSP core technology with its advanced speech processing algorithms, DSP Group also delivers a wide range of enabling application-specific DSPs. DSP Group is located in Santa Clara, California (408-986-4300, www.dspg.com) and has a VLSI design center located in Herzelia, Israel (972-9-952-9696).

Mentor Graphics

Mentor Graphics Corporation is a world leader in electronic hardware and software design solutions, providing products and consulting services for the world's largest electronics and semiconductor companies. Established in 1981, the company reported revenues over the last 12 months of $466 million and employs approximately 2,500 people worldwide. Company headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: http://www.mentor.com.

NOTE: Mentor Graphics is a registered trademark and Seamless CVE is a trademark of Mentor Graphics Corporation. Smartcore and OakDSPCore are registered trademarks of DSP group. All other tradenames, trademarks and registered trademarks are the property of their respective owners.

SOURCE: Mentor Graphics Corporation

Michael Cohen
Investor Relations
DSP Group, Inc.
408-986-4300
mcohen@dspg.com