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DSP Group Releases The Teak -- The Second Member In The Company’s TeakDSPCore Family Of High-Performance, Digital Signal Processing Cores

SANTA CLARA, CALIFORNIA, May 24, 1999 -- DSP Group, Inc. (NASDAQ: DSPG), a leader in the development and marketing of high-performance, cost-effective digital processing cores and associated digital speech technology, today announced the release of the Teak™ - the second member of the company's TeakDSPCore® family of high-performance, digital signal processing cores. National Semiconductor Corporation, Samsung Electronics Co. Ltd. and Sony Corporation are the first three industry leading companies to license the TeakDSPCore, with additional licensees predicted in the future. DSP Group unveiled the Teak's powerful features, with an in-depth overview of the core's unique design challenges, on May 5, 1999, at the "Embedded Processor Forum" held in San Jose, CA.

The TeakDSPCore family, is the third generation of DSP-licensable cores in the company's portfolio of leading-edge DSP core technology solutions and follows in the footsteps of the PineDSPCore®, the OakDSPCore®, and the PalmDSPCore™.

With the Teak, DSP Group further enhances its proven and successful business model, focused on the development and licensing of DSP cores to its customers. The company offers a full line of DSP cores at different performance and power consumption levels, which currently benefits more than 32 core technology licensees.

The TeakDSPCore's immediate market includes the existing OakDSPCore customers, seeking improved performance at affordable prices, as well as a fast growing marketplace of potential new customers looking for high-volume, cost-effective DSP core solutions.

The TeakDSPCore family is composed of two different core models: the TeakLite™ and the Teak, which address different performance levels. The TeakLite is targeted at cost-sensitive applications such as modems, cellphones and VoIP terminals. The Teak is aimed at higher performance-oriented applications such as cellular 3G, fast modems and VoIP Gateways. Both cores are 16-bit fixed-point DSPs, but differ in their architecture and instruction set. At the same time, they both maintain binary and library compatibility to the OakDSPCore. The TeakLite is currently available, having been marketed from the first quarter of 1998. The Teak, the second member of the family, is currently being released to licensees.

"With the Teak, DSP Group took a rather unique architectural approach," said Bat-Sheva Ovadia, Director of Marketing and Business Development of DSP Cores, at DSP Group. "We kept the same programming model as in the OakDSPCore and the TeakLite; however we managed, with the addition of specialized instructions and mechanisms, to increase the performance level by 1.5 to 2 times as compared to the TeakLite, while maintaining software investment."

The Teak's core is a Dual MAC Architecture, with parallel instruction capability and can read or write double word from / to memory. This doubles the performance in critical and commonly used algorithms such as FIR and complex multiplication and improves the C-compiler performance. Special emphasis was given to FFT, Viterbi Decoder and trace-back algorithms. Adding dedicated built-in hardware accelerators and special addressing modes, results in FFT Butterfly execution in 5 cycles and Viterbi's Two Add-Compare-Select routine in 3 cycles.

The Teak is the only Dual MAC architecture in the market using a 16-bit instruction word for complete parallel instruction. The Teak code density leads to a substantial saving in code size, which reduces overall cost and current consumption.

In addition to many existing control mechanisms and instructions – the Teak's program memory size has been enlarged to 256K linear and 4M word using the Paging Method. In this way, the Teak can efficiently handle very large programs that may be needed when the DSP is used for both DSP and massive control functions. Dedicated mechanisms were also added to support real-time operating systems, such as unlimited nesting levels of zero-overhead mechanisms (Block-Repeat and Repeat) and wide Automatic Context Switching. The System Interface of the core incorporates a Vectored Interrupt, advanced DMA modes of operation (Burst Mode and Cycle Stealing) and user-definable data memory size.

The Teak's instruction-set is binary compatible with the TeakLite and the OakDSPCore. In this way, software investment is maintained, whereas the programmer or the C-compiler can speed up performance, by the local replacement of instructions.

The Teak runs at 140MHz @ 0.25u process and consumes only 0.25 mA/MHz at a very small size of 1.7 mm².

The Teak, like the TeakLite and the PalmDSPCore, was designed to be a fully synthesizable core - otherwise referred to as a 'soft core' design. Specifically, this means that the core can easily be converted or "ported" into different technologies and foundries using fully automated methods. As a result, time-to-market is significantly reduced. The core is a single-edge design and uses a JTAG interface for both debugging and emulation.

Will Strauss, President of market watcher Forward Concepts commented, "With the introduction of Teak, DSP Group continues to demonstrate its commitment to a roadmap that ensures that its licensees can continue providing state-of-the-art products. In addition to providing an easy upgrade path for existing product designs, the Teak provides the capability of opening up exciting new markets."

In addition, Eli Ayalon, President and CEO of DSP Group said, "The Teak shows our continued commitment to the DSP marketplace. We wanted to provide our large install base of licensees and their customers a substantial upgrade path, while at the same time, insuring the maintainability of their software investment. This will allow our customers to successfully compete in the most advanced DSP application marketplace without a need to redesign their software."

Bat-Sheva Ovadia
Director of Marketing and
Business Development of DSP Cores
DSP Group
(972) 9 952-9616
batsheva@dsp.co.il