ISS Co-Developed with Synopsys as Co-Verification Component
SAN JOSE, California, IP 2000 System-on-Chip Conference, March 20, 2000 –Endeavor Intertech Corporation and DSP Group, Inc. (Nasdaq: DSPG) announced today the launching of IPSim for Teak™, the new Certified Accurate Instruction Set Simulator (ISS); the first user-extensible core simulator based on DSP Group's popular TeakÒ core architecture. Endeavor's IPSim™ delivers a cycle-accurate ISS that boasts performance approaching 100,000 instructions per second. Endeavor and Synopsys, Inc. (Nasdaq: SNPS) have worked closely to insure that the resultant model satisfies the stringent demands of accuracy and completeness required by hardware/software co-verification users, in environments like Synopsys' Eaglei®.
Endeavor's Certified Accurate endorsement insures licensees that IPSim for Teak is 100% cycle and pin accurate, based on DSP Group's own hardware functional and stimulus/response timing test vectors. An IPSim model is not accepted as Certified Accurate until every pin on every cycle and every functional result is correct for each test vector supplied by DSP Group. IPSim for Teak achieves this stringent requirement. For this reason, IPSim for the Teak evokes the highest confidence whether used in HW/SW co-verification or as a standalone software algorithm simulator.
"We are pleased with our association with Endeavor," said DSP Group's Director of Development Tools & SW Support, Eyal Ben-Avraham. "Their attention to detail and resulting accuracy provides our TeakDSPCoreÒ licensees with a tool that will increase confidence in their System-on-Chip designs while at the same time reducing time to market."
IPSim for Teak was crafted to fill a gaping hole in the design of tools for such architectures—easy extensibility. DSP Group has designed the Teak as a core, which their customers enhance with additional functional units and devices. IPSim for Teak provides the same flexibility to the user, using Endeavor's IPXtend™ technology. IPXtend enables customers to write C-model components of the additional functional units that are automatically instantiated the next time IPSim is run. This allows the customer to make unique chip simulators out of a single IPSim core.
"Accuracy is essential," said Dan Budge, vice president and CTO of Endeavor Intertech. "But accuracy with performance and extensibility—especially with an architecture as advanced as the Teak—turns a single purpose tool into an essential instrument for considering design tradeoffs, performing co-verification, and developing system software."
"Cycle accuracy is highly valued by HW/SW co-verification users, because it allows them to accurately analyze the HW/SW performance of their real-time DSP-based system on chip applications before going to synthesis," said Dr. Geoffrey Bunza, vice president of Synopsys' Large Systems Technology Group. "Synopsys, DSP Group and Endeavor Intertech have worked closely together to produce this highly accurate, high performance solution."
The Teak is the second member of the TeakDSPCore family. Teak is a Dual MAC 16-bit fixed-point licensable DSP with an excellent code compactness. It is designed as soft-core and targeted to low-power applications. The Teak is aimed at higher performance-oriented applications such as cellular 3G, fast modems and VoIP Gateways.
IPSim for Teak is available with an ICE-like interface, as well as a C debugger interface. It features a waveform generation tool, which displays or generates any net-based signal waveform. Additionally, IPSim for Teak can be combined with other IPSim models to simulate a fully synchronized, complex multiprocessor simulation.
The Teak co-verification model will be distributed by Synopsys for the Synopsys Eaglei® product line and other hardware/software co-verification environments. Endeavor will market a standalone version of IPSim for Teak for software developers. The IPSim models will be available for Windows and Unix workstations in Q2 2000.
About Endeavor Intertech Corporation
Endeavor Intertech develops IPSim, world-class high performance, cycle-accurate instruction set and intellectual property simulators that can be applied to hardware/software co-verification, co-design, or as standalone instruction set simulators for software developers. Endeavor Intertech develops these and other software tools for DSP, VLIW, RISC, and other embedded cores and processors for its EDA and processor design customers. Endeavor also develops custom bus models to create turnkey HW/SW co-verification capable packages.
For more information on Endeavor Intertech's IPSim, please contact your Endeavor Intertech representative at email@example.com, or 1-503-628-6200. See Endeavor Intertech on the web at http://www.endeav.com.
About DSP Group, Inc.
DSP Group, Inc. is a global leader in the development and marketing of high-performance, cost-effective, licensable digital signal processing cores. The company's family of SmartCores™ DSPs provide ideal solutions for low-power speech and audio processing, wireless communication technologies such as 3G, GSM and CDMA, broadband modems, multimedia, advanced telecommunication systems, disk drive controllers and many other types of embedded control applications. By combining its DSP core technologies with its proprietary, advanced speech-processing algorithms – DSP Group also delivers a wide range of enabling, application specific ICs for full-featured integrated telephony products and applications, including digital spread spectrum wireless technologies. DSP Group, Inc. maintains an international presence with offices located around the globe. For more information visit DSP Group's web site at http://www.dspg.com.
Synopsys, Inc. is a leading supplier of electronic design automation (EDA) solutions to the global electronics market. The company provides comprehensive design technologies to creators of advanced integrated circuits, electronic systems and systems on a chip. Synopsys also provides consulting services and support to its customers to streamline the overall design process and accelerate time-to-market. Additional information about Synopsys is available at http://www.synopsys.com.
IPSim™, IPXtend™ and IPSim for Teak™ are trademarks of Endeavor Intertech Corporation.
SmartCores™ is a trademark of DSP Group, Inc.
TeakDSPCoreÒ and TeakÒ are registered trademarks of DSP Group, Inc.
Synopsys® and Synopsys Eaglei® are registered trademarks of Synopsys, Inc.
Other brands and products referenced herein are the trademarks or registered trademarks of their respective holders.
For DSP Group:
Dir, Marketing & Business Development
tel: + 972-9-952-9616
For Endeavor Intertech Corporation:
David N. Glass
tel: (503)628-6200 x100