ORLANDO, FLORIDA, DSP World Fall Design Conference, November 1, 1999 -- AXYS Design Automation, Inc., of Irvine, California announced today at the ICSPAT'99/DSP World Expo in Orlando, Florida, the immediate availability of the phase-accurate SuperSim HW/SW co-verification model for the OakDSPCoreÒ from DSP Group. The new model offers a 1000x speedup over the OakDSPCore RTL model, with full phase-level accuracy and complete software debugging support. The model was successfully verified against DSP Group's HW reference model on the accompanying test suites.
"Licensees of DSP Group's OakDSPCore are now able to run CDMA and GSM software and HW/SW co-simulations in minutes instead of days with the full confidence that they are getting the same results as with the RTL model," says AXYS' President Vojin Zivojnovic.
OakDSPCore is a 16-bit general purpose low-power, low-voltage and high speed licensable Digital Signal Processing (DSP) core designed for speech/audio processing, telecommunications, digital cellular, and embedded control applications. Among the applications supported by OakDSPCore are cellular telephones, facsimile machines, modems and hard disk drives. In combination with the ARM7TDMI core, OakDSPCore represents a main component in advanced System-on-a-Chip solutions for portable wireless devices.
"Through the cooperation with AXYS, our SmartCoresÒ licensees now have the ability to make HW/SW trade-offs and verify their System-on-a-Chip designs early on in the design cycle," said DSP Group's Director of Development Tools & SW Support, Eyal Ben-Avraham.
The new model is currently available with the SW debugger, VHDL and Verilog wrappers, as well as part of the co-verification tools of Cadence, Mentor and Yokogawa scheduled for Q4'99. The models for other cores of DSP Group, including the TeakLite™ DSP Core, the TeakDSPCoreÒ and the PalmDSPCoreÒ will follow shortly.
AXYS with facilities in Irvine, CA and Herzogenrath, Germany offers processor-centric verification products to customers with high demands regarding simulation speed, accuracy, peripheral integration, tool coupling and model design-time. The SuperSim processor simulation technology was initially developed at Aachen University of Technology, Germany. In 1997 the research team transferred to AXYS. The OAK SuperSim is the first in the series of high-end HW/SW co-verification models of DSP and other embedded processors, which AXYS shall make available to the open market.
About DSP Group, Inc.
DSP Group, Inc. is a global leader in the development and marketing of high-performance, cost-effective, licensable digital signal processing cores. The company's family of DSP cores provide ideal solutions for low-power speech and audio processing, wireless communication technologies such as 3G, GSM and CDMA, fast modems, multimedia, advanced telecommunication systems, disk drive controllers and many other types of embedded control applications. By combining its DSP core technologies with its proprietary, advanced speech-processing algorithms – DSP Group also delivers a wide range of enabling, application specific ICs for full-featured integrated telephony products and applications, including digital spread spectrum wireless technologies. DSP Group, Inc. maintains an international presence with offices located around the globe. For more information visit DSP Group's web site at http://www.dspg.com
SuperSim is a trademark of AXYS Design Automation, Inc.
TeakLite is a trademark of DSP Group, Inc.
SmartCores, OakDSPCore, TeakDSPCore and PalmDSPCore are registered trademarks of DSP Group, Inc.
All other trademarks are the property of their respective companies
AXYS Design Automation, Inc.
One Technology Drive, I-807
Irvine, CA 92618 USA
phone: (949) 763-9660
fax: (949) 753-9661